Staff Package Design Engineer

About the role

Renesas Electronics is looking for a Staff Package Design Engineer in Bangkok to advance next-generation semiconductor packaging technologies such as PowerQFN, Flip-Chip and SiP, which are in growing demand in AI, High Performance Computing and Vertical Power Delivery. The role covers power packages for AI/HPC, server VR core/peripheral and accelerator/GPU markets.

Key responsibilities

• Design and develop package and interconnect methods for Power SiP/modules, flip-chip LGA, multi-chip modules and power device packaging.
• Work with OSAT/CMOS foundries to run design of experiments (DOEs) that optimize processes and set process specifications.
• Work with Product Groups and Reliability teams to qualify new packages and processes within the required timeframe.
• Ensure a smooth move to production by resolving integration issues, setting up production controls and monitors, and tracking and fixing process issues.
• Maintain technical expertise on advanced leadframes, power SiP/modules and flip-chip interconnects.
• Address internal and external customer complaints in collaboration with Marketing, Product, Quality and Operations.

Required profile

• Masters or Bachelor's degree in Physics, Chemistry, Mechanical, Electrical or Materials Engineering.
• 5-15 years of relevant experience in package development, emphasizing leadframe, laminate, power QFN/SiP/module, flip-chip packaging and wafer front-side/back-side metallization processing.
• Understanding of semiconductor power device package assembly processes, materials and technology.
• Strong interpersonal, communication, analytical and presentation skills.

Required skills

• Knowledge of AutoCAD, Excel, PowerPoint and Word.
• Knowledge of wafer front-side/back-side metallization, wire bonding, flip chip, multi-chip module, SPC and statistical analysis.